This Nonprovisional application claims priority under 35 U.S.C. § 119(a) on Patent Application No(s). 2003-165986 filed in JAPAN on Jun. 11, 2003, the entire contents of which are hereby incorporated by reference.
The present invention relates to a substrate to mount, e.g., an optical component thereon, and a manufacturing method thereof or the like. More particularly, the invention relates to a substrate in which a wiring is formed and a predetermined groove is manufactured, and a manufacturing method thereof or the like.
A recent progress in the optical communication technology has increased needs for, e.g., various components and devices used for a network, and optical modules using the same, and research and development have been actively conducted. Especially, a module, in which components such as an optical fiber, a lens, and a laser diode are appropriately combined, has been often used as a basic component.
As a conventional technology of such an optical element module, there has been disclosed, for example, an optical element module in which a groove is disposed in an Si substrate, a spherical lens is positioned and fixed in the groove, and a predetermined wiring is formed on the Si substrate (see Patent Document 1, for example). Such a module has several forms. Among those forms, a method of forming a groove in an Si wafer by micromachining (MEMS), which is a 3-dimensional manufacturing technology, and embedding and fixing a fiber or a lens in the groove has been a focus of attention as a method of excellent mass productivity. A substrate for an optical module formed by the MEMS is called a silicon optical bench (bench, or optical bench), and constitutes one of key devices.
The optical bench constituted of a silicon wafer has high mass productivity because it can be formed by processing a single wafer. However, when the optical bench is mounted with a component having a wiring such as a laser diode, it has difficulties with the process. Specifically, while the wiring is generally formed as a metal-thin film by sputtering or the like and manufactured by pattering by means of photolithography or the like, a metal, which is a wiring material, is corroded when wiring formation is carried out first because the Si groove manufacturing by etching is executed using a strong alkali such as a potassium hydroxide (KOH). Since a protective film such as a resist or the like also has no sufficient resistance to the strong alkali, complete protection is difficult. In reality, therefore, the wiring formation is carried out after the groove manufacturing.
FIG. 6 is a flowchart schematically showing conventional bench manufacturing processes. First, an Si wafer prepared in step 301 is coated with a resist (step 302), and a mask is put thereon to execute patterning of a groove part thereof (step 303). Then, a film of a silicon dioxide is removed by hydrofluoric acid etching (step 304). Subsequently, KOH deep groove manufacturing is carried out, which is wet anisotropic etching that uses a strong alkali with the residual SiO2 as a mask (step 305). As a result, a groove for mounting an optical component on the Si wafer is deeply formed by etching.
When the groove manufacturing is carried out, a periphery of the groove is etched into an undercut shape, and thus an oxide film is left into a flash shape. Since the residual oxide film adversely affects resist flowing during resist coating, the residual oxide film is removed by hydrofluoric acid processing (step 306). As a result, the oxide film is completely removed from the Si wafer surface, and an oxide film is formed again to manufacture a wiring (step 307). Subsequently, Ti sputtering (step 308), Pt sputtering (step 309), Au sputtering (step 310) are executed, and Au/Pt/Ti etchings are executed (step 313) after the resist coating (step 311) and patterning (step 312), whereby a wiring is formed on the Si wafer in which the groove has been manufactured. In this example, the wiring is constituted of 3-layer sputtered thin films of Au/Pt/Ti, and Pt/Ti constitute adhesive layers of Au to Si. In reality, however, a resistance film, such as a TaN, a high-temperature solder land, such as an Au—Sn film, and the like as well as such a conductor wiring are formed and patterned as appropriate.
(Patent Document 1)
Japanese Patent Application Laid-Open No. 2002-162542 (pp. 3 to 4, FIG. 10)
However, in bench manufacturing processes as shown in FIG. 6, it is necessary to carry out processes of resist coating, exposure and the like for wiring pattering in a state in which the groove is present in the Si wafer, as described above. For this resason, coating performance is extremely reduced, and alignment accuracy is lowered, thereby causing a reduction in yield and a reduction in wiring accuracy. For example, the yield is normally below 50%, and the wiring accuracy needs a tolerance of about ±5 to 10 μm.
Furthermore, a so-called oxide film-added wafer having an oxide film formed on a surface thereof is used to manufacture the wiring. However, when the groove manufacturing is carried out, as described above, the periphery of the groove is etched into an undercut shape, whereby the oxide film is left into a flash shape. Since the residual oxide film adversely affects resist flowing during the resist coating, the residual oxide film must be removed by hydrofluoric acid processing, as described with reference to the step 306 of FIG. 6. Thus, since the oxide film is completely removed from the wafer surface by the hydrofluoric acid processing, it is necessary to form an oxide film again to manufacture the wiring, as described with reference to the step 307 of FIG. 6. This film formation requires, for example, a high-temperature heat treatment of about 1100° C., thereby causing a reduction in process efficiency. In addition, such re-oxidation may generate, e.g., a very small flash in an edge part. Additionally, the formation of the oxide film is all carried out in the thin film process of sputtering or the like, and not always satisfactory in terms of mass production efficiency.